It is desirable to lower the programming voltage for programming an antifuse into a conduction state. By having a low programming voltage, the gate oxide thickness of a programming transistor can be equal to that of a low-voltage transistor. Moreover, a low programming voltage reduces the diode junction breakdown voltage requirement for submicrometer technologies.
With dielectric-based antifuse technology, antifuse programming voltages have been lowered by reducing dielectric thickness. Some previous techniques use a nitride/oxide ("NO") dielectric having an equivalent oxide thickness of 65 Angstroms. According to such previous techniques, a scaled poly-poly antifuse can be programmed into a conduction state by a programming voltage of approximately 10.6 volts. According to previous techniques using an ONO dielectric, an antifuse can be programmed into a conduction state by a programming voltage of approximately 14.2 volts.
Nevertheless, by reducing dielectric thickness, the capacitance of an unprogrammed antifuse has increased. In a circuit based on antifuse interconnect architecture, such an increased capacitance degrades circuit speed performance and increases interconnect switching power dissipation. The capacitance is a function of dielectric area at the antifuse interface ("antifuse area") between two conductors.
Conventional planar contact-hole antifuses have acceptable time-dependent dielectric breakdown ("TDDB") reliability. Nevertheless, with previous techniques for fabricating antifuse structures within contact holes, antifuse area is difficult to reduce, and a reduction in antifuse cell size to approximately 0.2.times.0.2 .mu.m.sup.2 would rely upon an advanced lithographic capability of approximately 0.2 .mu.m.
Thus, a need has arisen for an antifuse structure and method of fabrication, in which antifuse area is reduced by more than approximately one order of magnitude, relative to previous techniques for fabricating antifuse structures within contact holes. Also, a need has arisen for an antifuse structure and method of fabrication, in which an antifuse cell size of approximately 0.2.times.0.2 .mu.m.sup.2 is achieved without relying upon an advanced lithographic capability of approximately 0.2 .mu.m. Further, a need has arisen for an antifuse structure and method of fabrication, in which capacitance of an unprogrammed antifuse is reduced, circuit speed performance is increased, and interconnect switching power dissipation is reduced. Moreover, a need has arisen for an antifuse structure and method of fabrication, in which time-dependent dielectric breakdown ("TDDB") reliability is at least comparable to TDDB reliability of conventional planar contact-hole antifuses.